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專利授權區

專利授權區
專利名稱(中)	半導體結構及其製造方法以及高電子遷移率電晶體及其製造方法
專利名稱(英)	SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF, AND HIGH ELECTRON MOBILITY TRANSISTOR AND MANUFACTURING METHOD THEREOF
專利家族	中華民國：I912936 美國：2026-0090000(公開號)
專利權人	國立清華大學 100.00%
發明人	黃敬源,賴俊豪
技術領域	材料化工,能源科技,資訊工程,電子電機,工業工程

專利摘要(中)
本揭示內容提供一種半導體結構，其包含一基板、一通道層、一阻障層、一閘極結構、一第一鈍化層及一第二鈍化層。通道層設置於基板。阻障層設置於通道層。閘極結構與第一鈍化層設置於阻障層。第二鈍化層設置於第一鈍化層，且第二鈍化層的一材料組成不同於第一鈍化層的一材料組成。通道層靠近阻障層處具有二第一二維電子氣區域，且二第一二維電子氣區域分別位於閘極結構的二側。阻障層靠近第一鈍化層處具有二第二二維電子氣區域，且二第二二維電子氣區域分別位於閘極結構的二側。藉此，可具有增強型及雙通道之效果。

專利摘要(中)

本揭示內容提供一種半導體結構，其包含一基板、一通道層、一阻障層、一閘極結構、一第一鈍化層及一第二鈍化層。通道層設置於基板。阻障層設置於通道層。閘極結構與第一鈍化層設置於阻障層。第二鈍化層設置於第一鈍化層，且第二鈍化層的一材料組成不同於第一鈍化層的一材料組成。通道層靠近阻障層處具有二第一二維電子氣區域，且二第一二維電子氣區域分別位於閘極結構的二側。阻障層靠近第一鈍化層處具有二第二二維電子氣區域，且二第二二維電子氣區域分別位於閘極結構的二側。藉此，可具有增強型及雙通道之效果。

專利摘要(英)
A semiconductor structure includes a substrate, a channel layer, a barrier layer, a gate structure, a first passivation layer and a second passivation layer. The channel layer is disposed on the substrate. The barrier layer is disposed on the channel layer. The gate structure and the first passivation layer are disposed on the barrier layer. The second passivation layer is disposed on the first passivation layer, and a material composition of the second passivation layer is different from a material composition of the first passivation layer. The channel layer has two first two-dimensional electron gas regions near the barrier layer, and the two first two-dimensional electron gas regions are respectively located on two sides of the gate structure. The barrier layer has two second two-dimensional electron gas regions near the first passivation layer, and the two second two-dimensional electron gas regions are respectively located on two sides of the gate structure. Therefore, the semiconductor structure can have enhancement-mode and dual-channel effects.

專利摘要(英)

A semiconductor structure includes a substrate, a channel layer, a barrier layer, a gate structure, a first passivation layer and a second passivation layer. The channel layer is disposed on the substrate. The barrier layer is disposed on the channel layer. The gate structure and the first passivation layer are disposed on the barrier layer. The second passivation layer is disposed on the first passivation layer, and a material composition of the second passivation layer is different from a material composition of the first passivation layer. The channel layer has two first two-dimensional electron gas regions near the barrier layer, and the two first two-dimensional electron gas regions are respectively located on two sides of the gate structure. The barrier layer has two second two-dimensional electron gas regions near the first passivation layer, and the two second two-dimensional electron gas regions are respectively located on two sides of the gate structure. Therefore, the semiconductor structure can have enhancement-mode and dual-channel effects.

聯絡資訊
承辦人姓名	李曉琪
承辦人電話	03-5715131 #31061
承辦人Email	hsiaochi@mx.nthu.edu.tw