專利授權區國立清華大學國際產學營運總中心 Operations Center for Industry Collaboration

搜尋專利授權區

關鍵字

» 新增關鍵字

選單

專利授權區

專利授權區
專利名稱(中)	半導體結構
專利名稱(英)	Semiconductor structure
專利家族	中華民國：I862984 大陸：CN116666452A(公開號) 美國：2023-0275161(公開號)
專利權人	國立清華大學 100.00%
發明人	黃智方,胡家瑋,許甫任
技術領域	電子電機

專利摘要(中)
本發明揭露一種半導體結構，包含：一蕭基二極體結構，該蕭基二極體結構包含：一第一N型半導體層、一第一溝槽、一第一絕緣層、至少兩個多晶矽層(Poly-Si)、一第一P型保護層以及一金屬層；第一溝槽延伸通過第一N型半導體層且設置於第一N型半導體層中；第一絕緣層設置於第一溝槽內；至少兩個多晶矽層設置於該第一溝槽內，上層的多晶矽層與下層的多晶矽層平行設置，且第一絕緣層位於第一溝槽之內；第一P型保護層用以接地且設置於第一溝槽底部，且該第一P型保護層並接觸第一絕緣層與下層的多晶矽層之底面；金屬層分別設置於半導體結構之一上表面與一下底面，以分別形成一源極與一汲極，做為半導體結構與外界連結之電極；金屬層覆蓋與第一溝槽，並在金屬層與第一N型半導體層頂部之交界處具有蕭基接面，且電子累積(Accumulated electrons)區形成在第一絕緣層外側；其中，第一P型保護層之底面與第一N型半導體層之交界面具有一PN接面。

專利摘要(中)

本發明揭露一種半導體結構，包含：一蕭基二極體結構，該蕭基二極體結構包含：一第一N型半導體層、一第一溝槽、一第一絕緣層、至少兩個多晶矽層(Poly-Si)、一第一P型保護層以及一金屬層；第一溝槽延伸通過第一N型半導體層且設置於第一N型半導體層中；第一絕緣層設置於第一溝槽內；至少兩個多晶矽層設置於該第一溝槽內，上層的多晶矽層與下層的多晶矽層平行設置，且第一絕緣層位於第一溝槽之內；第一P型保護層用以接地且設置於第一溝槽底部，且該第一P型保護層並接觸第一絕緣層與下層的多晶矽層之底面；金屬層分別設置於半導體結構之一上表面與一下底面，以分別形成一源極與一汲極，做為半導體結構與外界連結之電極；金屬層覆蓋與第一溝槽，並在金屬層與第一N型半導體層頂部之交界處具有蕭基接面，且電子累積(Accumulated electrons)區形成在第一絕緣層外側；其中，第一P型保護層之底面與第一N型半導體層之交界面具有一PN接面。

專利摘要(英)
The present invention discloses a semiconductor structure, comprising: a Schottky diode structure, the Schottky diode structure comprises: a first N-type semiconductor layer, a first trench, a first insulating layer, at least two polysilicon layer (Poly-Si), a first P-type protective layer and a metal layer; the first trench extends through the first N-type semiconductor layer and is disposed in the first N-type semiconductor layer; the first insulating layer is disposed in the first trench; at least two polysilicon layers are disposed in the first trench, the upper polysilicon layer and the lower polysilicon layer are parallel, and the first insulating layer is located in the first trench; the first P-type protective layer is grounded and disposed on the bottom of the first trench, and the first p-type protective layer contacts the first insulating layer and the bottom surface of the lower polysilicon layer; the metal layer is respectively disposed on an upper surface and a lower bottom surface of the semiconductor structure, the metal layer respectively formed a source electrode and a drain electrode as electrodes for the external connection of the semiconductor structure; the metal layer covers the first trench, and has a Schottky junction at the junction of the metal layer and the top of the first N-type semiconductor layer; an accumulated electrons region is formed outside the first insulating layer; wherein, the interface between the bottom surface of the P-type protective layer and the first N-type semiconductor layer has a PN junction.

專利摘要(英)

The present invention discloses a semiconductor structure, comprising: a Schottky diode structure, the Schottky diode structure comprises: a first N-type semiconductor layer, a first trench, a first insulating layer, at least two polysilicon layer (Poly-Si), a first P-type protective layer and a metal layer; the first trench extends through the first N-type semiconductor layer and is disposed in the first N-type semiconductor layer; the first insulating layer is disposed in the first trench; at least two polysilicon layers are disposed in the first trench, the upper polysilicon layer and the lower polysilicon layer are parallel, and the first insulating layer is located in the first trench; the first P-type protective layer is grounded and disposed on the bottom of the first trench, and the first p-type protective layer contacts the first insulating layer and the bottom surface of the lower polysilicon layer; the metal layer is respectively disposed on an upper surface and a lower bottom surface of the semiconductor structure, the metal layer respectively formed a source electrode and a drain electrode as electrodes for the external connection of the semiconductor structure; the metal layer covers the first trench, and has a Schottky junction at the junction of the metal layer and the top of the first N-type semiconductor layer; an accumulated electrons region is formed outside the first insulating layer; wherein, the interface between the bottom surface of the P-type protective layer and the first N-type semiconductor layer has a PN junction.

聯絡資訊
承辦人姓名	李曉琪
承辦人電話	03-5715131 #31061
承辦人Email	hsiaochi@mx.nthu.edu.tw