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專利授權區


專利授權區
專利名稱(英) DYNAMIC BIT-LINE CLAMPING CIRCUIT FOR COMPUTING-IN-MEMORY APPLICATIONS AND CLAMPING METHOD THEREOF
專利家族 美國:10,510,386
專利權人 國立清華大學 100%
發明人 陳韋豪,林威宇,張孟凡
技術領域 電子電機
專利摘要(英)
A dynamic bit-line clamping circuit for computing-in-memory applications is configured to clamp a bit line via at least one reference signal and includes a clamping node, a first clamping unit, a second clamping unit, a first feedback controlling unit and a second feedback controlling unit. The first clamping unit is electrically connected between the bit line and the clamping node. The second clamping unit is electrically connected between the clamping node and a power source voltage and includes a switch. The second feedback controlling unit is electrically connected to the clamping node and the switch. The second feedback controlling unit generates a switching signal according to the at least one reference signal and a voltage level of the clamping node. The switch is switched by the switching signal so as to clamp the voltage level of the clamping node according to the at least one reference signal.
聯絡資訊
承辦人姓名 李曉琪
承辦人電話 03-5715131 #31061
承辦人Email hsiaochi@mx.nthu.edu.tw
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