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專利授權區

專利授權區
專利名稱(中)	類神經網路系統、高效率內嵌式人工突觸元件及其操作方法
專利名稱(英)	NEURAL NETWORK SYSTEM, HIGH EFFICIENCY EMBEDDED-ARTIFICIAL SYNAPTIC ELEMENT AND OPERATING METHOD THEREOF
專利家族	中華民國：I803234 美國：2023-0292533(公開號)
專利權人	國立清華大學 100%
發明人	金雅琴,余昕芫,林崇榮
技術領域	材料化工,電子電機

專利摘要(英)
The present disclosure provides a high efficiency embedded-artificial synaptic element, which includes a semiconductor substrate, a select transistor, a metal layer, a first memory transistor and a second memory transistor. The select transistor is disposed on the semiconductor substrate and includes a select gate structure, a drain region and a source region. The metal layer is connected to the drain region. The first memory transistor includes a first gate structure, a first electrode regions and a first memristor. The second memory transistor includes a second gate structure, a second electrode regions and a second memristor. The second electrode regions and the first electrode regions are connected to each other and form a connection region. The connection region is connected to the metal layer. The first memristor is formed between the first gate structure and the connection region, and the second memristor is formed between the second gate structure and the connection region. Therefore, the output voltage has a good read window.

專利摘要(英)

The present disclosure provides a high efficiency embedded-artificial synaptic element, which includes a semiconductor substrate, a select transistor, a metal layer, a first memory transistor and a second memory transistor. The select transistor is disposed on the semiconductor substrate and includes a select gate structure, a drain region and a source region. The metal layer is connected to the drain region. The first memory transistor includes a first gate structure, a first electrode regions and a first memristor. The second memory transistor includes a second gate structure, a second electrode regions and a second memristor. The second electrode regions and the first electrode regions are connected to each other and form a connection region. The connection region is connected to the metal layer. The first memristor is formed between the first gate structure and the connection region, and the second memristor is formed between the second gate structure and the connection region. Therefore, the output voltage has a good read window.

聯絡資訊
承辦人姓名	李曉琪
承辦人電話	03-5715131 #31061
承辦人Email	hsiaochi@mx.nthu.edu.tw