A high efficiency embedded-artificial synaptic element includes a semiconductor substrate, a select transistor, a metal layer, a first memory transistor and a second memory transistor. The select transistor is disposed on the semiconductor substrate and includes a select gate structure, a drain region and a source region. The metal layer is connected to the drain region. The first memory transistor includes a first gate structure, a first electrode region and a first memristor. The second memory transistor includes a second gate structure, a second electrode region and a second memristor. The second electrode region and the first electrode region are connected to each other and form a connection region, which is connected to the metal layer. The first memristor is formed between the first gate structure and the connection region, and the second memristor is formed between the second gate structure and the connection region. |