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專利授權區


專利授權區
專利名稱(英) INPUT SEQUENCE RE-ORDERING METHOD AND INPUT SEQUENCE RE-ORDERING UNIT WITH MULTI INPUT-PRECISION RECONFIGURABLE SCHEME AND PIPELINE SCHEME FOR COMPUTING-IN-MEMORY MACRO IN CONVOLUTIONAL NEURAL NETWORK APPLICATION
專利家族 美國:2022-0391691(公開號)
專利權人 國立清華大學 100%
發明人 邱硯晟,劉大維,張富淳,張孟凡
技術領域 電子電機
專利摘要(英)
An input sequence re-ordering method with a multi input-precision reconfigurable scheme and a pipeline scheme for a computing-in-memory macro in a convolutional neural network application is configured to re-order a plurality of multi-bit input signals and includes performing a scanning step and a re-ordering step. The scanning step includes driving a scanner to scan one group of the multi-bit input signals to determine whether an initial value of a plurality of flag signals in one of a plurality of multi-bit section flags is changed to an inverted initial value according to a plurality of bit numbers of the one group of the multi-bit input signals. The re-ordering step includes driving a sorter to select a part of the one group of the multi-bit input signals corresponding to a plurality of the inverted initial values of the flag signals in the one of the multi-bit section flags.
聯絡資訊
承辦人姓名 李曉琪
承辦人電話 03-5715131 #31061
承辦人Email hsiaochi@mx.nthu.edu.tw
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